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Sandeep Neeli

ASIC Design Engineer
Sunnyvale, CA, USA
Short Bio:

Over two years of experience in hardware design, design flow and verification. Design and verification experience in DDR-SDRAM and its integration into H.264 video decoder.

Skills:

Systemverilog, Vhdl, Verilog, Perl, C, C++, Tcl, Unix, Ms Windows, Linux, Matlab, Simulink, Xilinx I

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